This invention relates to a semiconductor device having a structure provided with contact holes and wiring grooves in an insulating film, and a method for manufacturing such a semiconductor device.
At present, a wiring comprising Al as a main constituent material is employed in a semiconductor device. In particular, the wiring most popularly employed is manufactured by a process wherein a barrier film for inhibiting the Al film from reacting with an underlying layer is formed under an Al film, or a antireflection film for inhibiting the irregular reflection of light at the occasion of lithography is formed on an Al film, and then these laminated films involving the Al film thus deposited are etched by means of RIE. Further, with an increase in integration density of LSI, the wiring is now demanded to be formed into a multi-layer wiring structure, thus necessitating a development of a plug-forming technique for making a connection between an upper wiring and a lower wiring.
On the other hand, with an increase in integration density of semiconductor devices, the wiring becomes increasingly fine, resulting in an decrease in cross-sectional area of the wiring and hence in an increase in wire resistance. Moreover, the distance between each wirings becomes narrower, resulting in an increase in inter-wiring capacity.
Such increases in wire resistance and in inter-wiring capacity lead to an RC delay, thus hindering the operation of LSI. With an increase in fineness of LSI, a multi-layer wiring is becoming more important as a factor for determining the operation speed of LSI. Therefore, the lowering in resistance of wiring ELS well as the lowering of dielectric constant of interlayer insulating film are now urgently desired.
As one of the conventional plug-forming techniques, W (tungsten)-CVD technique is known to be excellent in step coverage. FIG. 1A shows a cross-sectional view of the conventional multi-layer wiring structure which has been formed by making use of the W-CVD technique. In FIG. 1A, the reference numeral 81 denotes an interlayer insulting film, 82 denotes a W plug and 83 denotes an Al wiring.
This W-CVD technique can be classified into two kinds, i.e. "blanket deposition" and "selective deposition". The "blanket deposition" is a method wherein a W film is deposited all over a substrate including the inner surface of contact holes. On the other hand, the "selective deposition" is a method wherein a W film is deposited selectively only on the bottom surface of contact holes.
Both methods are performed under a thermal condition which is different from each other. In the case of the "selective deposition", the interior of the contact holes can be filled with a W film in a single step. Whereas, in the case of the "blanket deposition", an etch-back step or a CMP step is required as a post treatment for removing part of W film which has been deposited outside the contact holes.
The W plug formed by making use of the afore-mentioned W-CVD technique is accompanied with problems that it is high in resistance and poor in EM (electromigration) resistance.
The EM is a phenomenon where Al atoms in an Al wiring are caused to move due to the collision thereof with electrons as an electric current is passed through the Al wiring. W is a material which is more resistive to EM as compared with Al. When an upper Al wiring and a lower Al wiring are connected with each other through a W plug, an accumulation of Al atoms takes place at the upstream side of the flow of Al atoms while a depletion of Al atoms takes place at the downstream side.
The accumulation of Al or depletion of Al of this kind may give rise to the generation of hillocks or voids, thus leading to a short circuit between wirings or a disconnection of wiring.
Further, in the case of the "blanket deposition", part of W film which has been deposited outside the contact holes is required to be removed, thus leading to an increase in number of manufacturing step. On the other hand, in the case of the "selective deposition" where a step of removing W film deposited outside the contact holes is not required, the selectivity of deposition is frequently deteriorated at present so that a step of RIE etch-back is also required subsequently.
As an alternative plug-forming technique, an Al reflow technique is also known wherein a plug is formed by making use of Al which is lower in resistance than W. This method is featured in that it takes advantage of the fluidity through the surface diffusion of an Al film. This method is advantageous in that the interior of the contact hole can be filled with Al by simply heating a substrate, thus making it possible to decrease the number of the manufacturing step.
As a result of extensive studies, an underlying layer made for instance of Ti (titanium) which is excellent in wettability in relative to Al is frequently employed in the deposition of Al film. Furthermore, a two-step reflow method, wherein Al is sputtered at first without heating and then Al is sputtered again under a heated condition, is increasingly employed at present, since it is possible with this method to lower the fluidization temperature and to fill even a contact hole of high aspect ratio (A.R.) (aspect ratio =depth of contact hole/pore diameter of contact hole).
Additionally, there have been various proposals wherein a reflow technique is combined with a sputtering technique of high directivity, such as a low pressure-long distance sputtering, a collimation sputtering and an HDP (high density plasma) sputtering.
On the other hand, there is a problem in the aforementioned Al reflow technique that it is very difficult with this method to effectively fill a contact hole of high A.R. with Al. Since the Al reflow technique is based on sputtering, it is inherently poor in step coverage.
Thus, the film thickness of Al becomes relatively thin at the bottom portion of contact hole, and the Al may be agglomerated when it is heated for fluidization, generating voids in the Al film buried in the contact hole. For the purpose of overcoming this problem, a material such as Ti which is excellent in wettability to Al is employed as an underlying film as mentioned above, whereby preventing the agglomeration of Al.
However, when an underlying film is formed by a sputtering of Ti, an over-hang may be caused to develop at the opening portion of the contact hole, and the surface of Ti thus formed may become rugged. This rugged surface can be ascribed to the crystal face dependency of the crystal growth of Ti. The over-hanging of Ti as well as the rugged surface of Ti prevents not only the adhesion of Al but also the reflow property of Al. Moreover, even if a directional sputtering of Ti is employed, it is almost impossible to deposit a sufficiently thick Al film on the side wall of contact hole according to the current technique.
Further, since Ti is reactive to Al, an Al.sub.3 Ti film is formed on the bottom of contact hole, and this Al.sub.3 Ti film may become a cause for deteriorating the EM resistance of the Al plug as in the case of the W plug.
The application of the Al reflow technique to a damascene structure or a dual damascene structure is recently studied. FIG. 1B illustrates a cross-sectional view of the conventional dual damascene multi-layer wiring structure which has been formed by making use of the Al reflow technique. In FIG. 1B, the reference numeral 84 denotes a Ti/TiN laminate film, 82 and 83 denotes an Al.sub.3 Ti film.
This dual damascene structure (DD structure) can be obtained by a process wherein contact holes and wiring grooves are formed in advance in an insulating film, and, after the interiors of these contact holes and wiring grooves are concurrently filled with Al film in a single step, any excessive externally exposed Al film is removed by means of CMP (chemical mechanical polishing), whereby simultaneously forming Al wirings and Al plugs. It is possible, according to this dual damascene structure, to simplify the manufacturing process and to save the manufacturing cost.
However, when a Ti film is employed as an underlying film and the Al-DD structure is formed by making use of the Al reflow technique, the Al.sub.3 Ti film may be formed also on the inner surface of the wiring grooves, since the wiring grooves are disposed at the upper portion of the contact hole. Since Al.sub.3 Ti is high in electric resistance, the formation of Al.sub.3 Ti within the wiring may invite a reduction of the effective volume of the Al film and an increase in wire resistance. This problem becomes more serious as the width of wiring becomes increasingly narrow.
As explained above, there have been proposed various kinds of plug-forming technique for filling a contact hole of high aspect ratio with a conductive material. Among them, the Al reflow technique is directed to the formation of a dual damascene structure. However, when the dual damascene structure is formed by making use of the Al reflow technique, Al.sub.3 Ti is caused to be formed due to a Ti/TiN laminate film to be employed as an underlying film, thus giving rises to the problem of an increase in wire resistance.
Aside from the aforementioned conventional methods, a method of covering a step portion (overhang portion) through a substitution between an Si film and an Al film has been proposed (Japanese Patent Unexamined Publication S/60-46024).
This method is known to be excellent in step coverage and can be performed by making use of the Si-CVD technique which has been employed in the manufacture of an LSI. Namely, according to this method, the overhang portion is covered in advance with an Si film, an Al film is then deposited on the Si film by means of sputtering, and the resultant layers, are heat-treated thereby substituting the Al film for the Si film.
According to this method, it is possible to perform the covering of an overhang portion with an Al film, which could not be realized if only a sputtering method is employed, or to perform the filling of a contact hole of high aspect ratio with an Al film.
However, if the quantity of Si diffused into the Al film exceeds over the solid solution limit (the extent of solid solution) thereof in this method, an Si nodule (precipitation) may be formed at another location. If this Si nodule is formed within a wiring, it may become a cause for increasing the electric resistance of the wiring, and if this Si nodule is formed between wirings, it may become a cause for a short circuit between the wirings.
For the purpose of minimizing the development of Si nodule, there has been proposed a method wherein a Ti film is formed on an Al film, and then the Si diffused into the Al film is allowed to be trapped by making use of the Ti film (Japanese Patent Unexamined Publication S/63-70455).
According to this method, since the Si in the Al film can be absorbed by the Ti film, it is possible to suppress an increase in resistance of an Al--Si alloy wiring due to the Si nodule that may be generated at the bottom of contact hole during a heat treatment.
This method however is accompanied with a problem that since Ti is contained in the wiring, a high resistant Al.sub.3 Ti is formed during heat treatment as in the case of the aforementioned reflow, so that the volume of Al in relative to the volume of wiring is substantially decreased, thus increasing the wire resistance. This problem of increase in wire resistance becomes more serious as the wiring becomes higher in integration and in fineness.
There is also proposed a method (Japanese Patent Unexamined Publication H/2-199838) which is substantially a combination of the method disclosed in Japanese Patent Unexamined Publication S/60-46024 and the method disclosed in Japanese Patent Unexamined Publication S/63-70455.
According to this method, the interior of contact hole is filled in advance with an Si film by making use of the Si-CVD technique, and then an Al film is substituted for the Si film, whereby making it possible to carry out the filling of a contact hole of high aspect ratio, any excessive Si film being absorbed by making use of a Ti film.
According to this method, it is possible to fill a contact hole of high aspect ratio with an Al film. The Al film is subsequently worked by means of RIE to form an Al wiring.
However, this method is accompanied with the following problems. Namely, the Al film to be obtained according to this method contains a product of high resistance such as Al.sub.3 Ti, which may be formed through a reaction between Ti silicide to be formed through a absorption of the Al film by the Ti film and the Al film, or through a reaction between an excessive Ti film which has not been served for the absorption of the Si film and the Al film.
Therefore, when the Al film containing a product of such a high resistance is worked by means of RIE to form an Al wiring, an Al wiring 83 containing a high resistance product 87 on its upper surface as shown in FIG. 2A, or an Al wiring 83 containing a high resistance product 87 on its upper surface and side walls as shown in FIG. 2B would be obtained.
The Al wiring 83 containing such a high resistance product 87 is too high in resistance to use it as a fine wiring. The reference numeral 86 shown in these FIGS. 2A and 2B denotes a first wiring.